- Type Validation
- Level Intermediate
Analog Simulation with PSpice using Design Entry HDL vSPB23.1 Exam
Issued by
Cadence Design Systems
The earner of this badge can perform fundamental steps of analog simulation using the PSpice and Design Entry HDL tool set. The earner of this badge can create a Design Entry HDL schematic and run different types of PSpice simulations including DC Sweep analysis, AC Sweep analysis and transient analysis. They can also create subcircuits, edit existing models and download models from a vender website and create a symbol and model so the part can be simulated.
- Type Validation
- Level Intermediate
Skills
- AMS Designer
- Cadence
Earning Criteria
-
Score 96% or greater on the exam.