Design for Test Fundamentals v5.0 Exam
Issued by
Cadence Design Systems
This exam is a certification towards earning a badge for training conducted by the DSF team on ATPG (Automatic Test Pattern Generation) Flow and testing digital IC.
- Type Validation
- Level Intermediate
Skills
- Cadence
- Design For Test
Earning Criteria
-
Score 96% or greater on the exam.