- Type Validation
- Level Intermediate
SiP Layout v17.2-2016QIR7 Exam
Issued by
Cadence Design Systems
The earner of this badge is able to perform the basic steps for flip-chip and wirebond BGA package design. This includes the ability to add standard die components using text file input or auto-generation wizards. The earner of this badge can use several techniques to define and modify parts and connectivity. The earner of this badge can create voltage planes, perform basic manual and automatic routing, and produce basic manufacturing output.
- Type Validation
- Level Intermediate
Earning Criteria
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Score 96% or greater on the exam.