VLSI Testing and Testability Course- Vellore Institute of Technology, Vellore

Issued by Siemens Software

Earners of this badge are able to identify VLSI test principles and DFT architectures in an effort to help them design better quality products that can be reliably manufactured in large quantity. Earners also have obtained hands-on experience on ATPG, Scan testing, Scan compression, and Memory BIST.

Type Learning
Time Months

Skills

Automatic Test Pattern Generation
Boundary scan architecture
Built-in-Self Test
DFT synthesis
Memory BIST
Scan compression
Scan Insertion
Tessent

Earning Criteria

Pass the course with grade B or higher.
Performed DFT synthesis, Scan insertion, ATPG, compression, Memory BIST using Tessent.
Professor approved portfolio submitted.
Completed all the lab tasks in timely manner.