The earner of this badge has demonstrated the knowledge required for running the Synopsys Design Compiler® NXT tool to perform power analysis and power optimization tasks including clock gating, self-gating, and multibit register banking. This also includes low-power placement using the Synopsys IC Compiler™ II tool and enabling the Synopsys DesignWare® tool to reduce the total power.

• Type Validation
• Level Intermediate