The earner of this badge has demonstrated the knowledge how to perform Static Timing Analysis (STA) and Signal Integrity (SI) analysis on a block or chip-level design using the PrimeTime Suite of tools. This includes how to Identify constraints that are either incomplete or incorrect causing invalid timing violations or hiding real timing violations, generate reports by executing the appropriate high-level summary reports initiating your analysis, customizing, and interpreting detailed timing re

• Type Certification
• Level Foundational