- Type Validation
- Level Foundational
SystemVerilog Assertions Exam
Issued by
Synopsys
This earner of this badge has demonstrated the knowledge required to write SystemVerilog Assertions and verify a device-under-test (DUT) using the Synopsys VCS® tool. This includes writing immediate and concurrent assertions, using assertion libraries, and obtaining coverage information on assertions to assess the effectiveness and efficacy of your testbenches.
- Type Validation
- Level Foundational
Skills
- Assertions
- Debug
- EDA
- IC Logic Verification
- Synopsys
- SystemVerilog
- Testbench
- Verification